p-n Junction controlled field emitter array cathode

Abstract

A Field Emitter Array comprising a semiconductor substrate with an emitterurface formed thereon. A plurality of emitter pyramids is disposed on the emitter surface for emitting an electron current. The magnitude of the electron current emitted by each emitter pyramid I max , is controlled by a reverse-biased p-n junction associated with each emitter pyramid where I max =j sat X A p-n , j sat being the saturation current density and A p-n being the area of the reverse-biased p-n junction associated with each emitter pyramid. A grid, positively biased relative to the emitter surface and the emitter pyramids, is disposed above the emitter surface for creating an electric field that induces the emission of the electron current from the emitter tips.

Claims

What is claimed and desired to be secured by Letters Patent of the Unites States is: 1. A field emitter array (FEA) comprising: a semiconductor substrate, an emitter surface formed on said substrate; a plurality of field emitter sites, with each field emitter site including an emitter pyramid, with a tip, sides, and a base for emitting electrons in the presence of an electric field, wherein the base of said emitter pyramid is disposed upon said emitter surface, said emitter site also including a permanent reverse-biased p-n junction, where said junction is the boundary between a p-type layer and an n-type layer of semiconductor material, wherein said p-n junction is positioned relative to said emitter pyramid so that an electron current flowing from said substrate into said emitter pyramid must traverse said p-n junction and wherein said p-n junction is oriented so that the n-layer is disposed between said junction and the tip of said emitter pyramid and is isolated from all other emitter pyramid n-layers, said p-n junction acting to limit the magnitude of the current density flowing therethrough to j sat , where j sat is the saturation current density of said p-n junction in reverse bias; and a grid, positioned above said emitter surface, for inducing the emission of electron current from said emitter pyramid where said grid is positively biased relative to said emitter pyramid with a bias voltage sufficient to cause said p-n junction to operate in reverse-biased saturation. 2. The FEA recited in claim 1, wherein all of said p-n junctions have equal area; and further comprising means for biasing said grid relative to said emitter pyramid with a reverse bias sufficient to cause said p-n junction to operate in reverse-biased saturation. 3. The FEA recited in claim 2, wherein said p-n junctions are disposed at the base of said pyramids. 4. The FEA recited in claim 3 wherein: said substrate is fabricated from a single-crystal silicon wafer and wherein: said emitter surface is a planar surface oriented parallel to the 100 plane of said silicon substrate. 5. The FEA recited in claim 4 wherein: the sides of said emitter pyramid are substantially parallel to the 111 planes of said silcon substrate. 6. The FEA recited in claim 5 wherein: said emitter pyramid is integral with said silicon substrate. 7. The FEA recited in claim 6 wherein: said p-n junction is substantially parallel to the 100 plane of said silicon substrate. 8. The FEA recited in claim 7 wherein: said p-n junction is disposed within said emitter pyramid. 9. The FEA recited in claim 8 wherein: the radii of the tip of said emitter pyramid is in the range of about 100 Angstroms to about 600 Angstroms. 10. The FEA recited in claim 9 wherein: the thickness of said grid is in the range of about 0.2 microns to about 1.5 microns. 11. An FEA comprising: a semiconductor substrate; an emitter surface formed on said substrate; a planar, permanent reverse-biased p-n junction disposed within said substrate parallel to said emitter surface, where said p-n junction is the boundary between a p-type layer and an n-type layer of semiconductor material, wherein said n-layer is disposed between said junction and said emitter surface and is isolated from all other emitter pyramid n-layers, said p-n junction for limiting the magnitude of the current density flowing there-through to j sat , where j sat is saturation current density of the reverse-biased junction; a plurality of isolation grooves formed in said emitter surface, wherein the bottom of said grooves is below said p-n junction; a plurality of isolation islands formed on said substrate, wherein each isolation island is circumscribed by said isolation grooves and wherein the area of each isolation island is substantially equal to a constant value, A p-n ; a plurality of emitter pyramids, each with a tip, sides, and a base, formed on said emitter surface wherein only one emitter pyramid is disposed on each isolation island so that the magnitude of the current emitted through the tip of each of said emitter pyramid is equal to: I=j.sub.sat ×A.sub.p-n a grid, positioned above said emitter surface, for inducing the emission of electron current from the tips of said emitter pyramids where said grid is positively biased relative to said emitter pyramids with a bias sufficient to cause said p-n junction to operate in reverse-biased saturation. 12. The FEA recited in claim 11 wherein: said substrate is fabricated from a single crystal silcon wafer and wherein: said emitter surface is a planar surface oriented parallel to the 100 plane of said silicon substrate. 13. The FEA recited in claim 12 wherein: the side of said emitter pyramids are substantially parallel to the 111 planes of said substrate. 14. The FEA recited in claim 13 wherein: said emitter pyramids are integral with said silicon substrate. 15. An FEA comprising: a substrate formed from a single crystal silicon wafer; a planar emitter surface formed on said substrate where said emitter surface is parallel to the 100 plane of said substrate; a plurality of emitter pyramids formed on said emitter surface for emitting an electron current, each of said emitter pyramids including a p-type layer and an n-type layer with a planar reverse-biased p-n junction disposed therebetween, wherein said n-layer is isolated from all other emitter pyramid n-layers, said p-n junction being disposed parallel to said emitter surface and completely spanning the cross-section of the emitter pyramid so that an electron current flowing from the substrate to the tip must pass through the reverse-biased p-n junction and so that the magnitude of said electron current is equal to the saturation current density of said p-n junction multiplied by the area of said p-n junction; and a grid, disposed above the emitter surface, biased positively relative to said emitter pyramids with a bias voltage sufficient to cause said p-n junction to operate in reverse-biased saturation, said grid for inducing the emission of electron current from said emitter pyramids. 16. A method for providing a uniform, reproducible electron current from an FEA of the type with a plurality of emitter pyramids disposed on an emitter surface, with each emitter pyramid-emitter surface combination including a p-n junction formed for an n-type layer and a p-type layer of semiconductor material so that electron current flowing into said pyramid from said emitter surface must traverse said p-n junction, and wherein said p-n junction is oriented so that the n-layer is disposed between said junction and the tip of said emitter pyramid and is isolated from all other emitter pyramid n-layers, with all of said p-n junctions having an equal area, and including a conducting grid disposed above said plurality of emitter pyramids, said method comprising the steps of: biasing said conducting grid positively relative to the emitter pyramids so that an electron current is emitted by said emitter pyramids; and reverse-biasing said p-n junctions with a bias voltage sufficient to cause said p-n junctions to operate in reverse-bias saturation, so that the electron current emitted by each emitter pyramid must pass through the p-n junction associated therewith thereby limiting the magnitude of the electron current, I c , emitted by each emitter pyramid to I.sub.c =j.sub.sat ×A.sub.p-n, where j sat is the saturation current density and A p-n is the area of each reverse-biased p-n junction.
BACKGROUND OF THE INVENTION The invention relates generally to cathodes for vacuum tubes and more particularly to field emitter array (FEA) cathodes for use with traveling wave tube (TWT) amplifiers or other electron devices. An FEA generally comprises two closely spaced surfaces. The first, an emitter surface, has a large number of pyramid like shapes formed thereon. The second, a grid surface, is generally a metal sheet disposed above the emitter surface and electrically insulated therefrom. The grid generally has apertures disposed above the tips of the pyramids so that electrons emitted from the pyramid tips pass through the apertures when the grid is biased in a positive sense relative to the emitter pyramids. The separation between the emitting surface and the grid is generally on the order of microns so that low grid voltages induce large emission currents. The emitted electrons may be accelerated and formed into a beam by standard techniques. The FEA is now being utilized in many electron devices due to its inherent advantages over thermionic cathodes. Among these advantages are: (a) higher emission currents; (b) lower power requirements (c) less expensive fabrication and (e) easier interfacing with integrated circuits. However, despite the existence of the above-described advantages the utility of the FEA in microwave and millimeter amplifiers has been limited by two factors. First, the strong dependence of the emitted current on the emitter tip shape coupled with the difficulty of controlling tip shape results in poor point-to-point emission uniformity over the surface of the FEA. Second, residual gas absorbtion/desorption by the tips results in an emission current that is unstable and non-reproducible at a fixed grid voltage. OBJECTS OF THE INVENTION Accordingly. it is an object of the invention to provide an FEA with substantially uniform point-to-point electron emission current density over the surface of the FEA. It is a further object of the invention to provide an FEA with a stable and reproducible emission current density for a fixed grid voltage. SUMMARY OF THE INVENTION The above and other objects are achieved in the present invention which comprises a semiconductor substrate with an emitter surface formed thereon. A plurality of nearly identical emitter pyramids are formed on the emitter surface for emitting electrons in the presence of an electric field. The maximum current emitted by each pyramid due to a given electric field will vary because of variations in the shape and surface conditions of the pyramid tips. In order to equalize the magnitude of the current emitted by every pyramid to a constant value, I max each emitter pyramid in the present invention has a reverse biased p-n junction associated therewith. The p-n junction is positioned so that the electron current emitted by its associated emitter pyramid must pass through the junction. Thus the magnitude of current emitted by the emitter pyramid is equal to the constant saturation current density of the reverse-biased p-n junction multiplied by the area of the junction. Since the FEA of the present invention is fabricated so that the saturation current density and the areas of all the p-n junctions are equal, the magnitudes of the electron currents emitted by each of the emitter pyramids are also equal. The potential difference required to create the electric field at the emitter pyramids and to provide reverse-biasing of the p-n junctions is provided by biasing a conducting grid disposed above the emitter surface positively relative to the emitter pyramids and the substrate. The grid includes a plurality of apertures disposed to allow electron current to flow from the emitter pyramids. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a first embodiment of the invention. FIG. 2 is a cross-sectional view of the embodiment depicted in FIG. 1. FIG. 3A-3H are cross-sectional views of intermediate structures formed during the fabrication of the embodiment depicted in FIG. 1. FIG. 4 is a perspective view of a second embodiment of the invention. FIGS. 5A-5D are cross-sectional and top views of intermediate structures formed during the fabrication of the embodiment depicted in FIG. 4. DESCRIPTION OF THE PREFERRED EMBODIMENT Briefly, the present invention comprises an emitter surface with a plurality of emitter pyramids formed with their bases thereon, and a conducting grid, supported by a dielectric layer disposed on the emitter surface, positioned above the emitter surface. The dielectric layer-grid structure has a plurality of apertures formed about the emitter pyramids. When the grid is biased positively relative to the emitter pyramids, electrons will be emitted through the pyramid tips. Although the pyramids fabricated as described below will be geometrically similar, the actual values of emission current will vary due to small variations in tip shape and tip surface conditions. Despite the above mentioned variations there is a maximum value of emission current that will be emitted by every pyramid when exposed to a sufficient positive grid voltage, V o . The present invention provides a novel means for maintaining the total current flow emitted by each pyramid at a constant value, I max , when the grid voltage is greater than V o . This maintenance of constant total current flow into each pyramid is achieved by fabricating the FEA so that the total current flowing into each pyramid, I c , must pass through a reverse-biased p-n junction of a given area uniquely associated with each pyramid. Thus I.sub.max =I.sub.c =j.sub.sat ×A.sub.p-n where j sat is the saturation current through the reverse-biased p-n junction and A p-n is the area of the p-n junction associated with each of the pyramids. As described below, j sat is constant over a large range of grid voltages. Thus an FEA built according to the inventive concepts described and claimed herein exhibits point-to-point uniformity since the emission current at every tip is equal to I max and I max is a stable, reproducible function of the grid voltage. Referring now to the drawings wherein like reference numerals designate identical or corresponding parts throughout the several views, FIG. 1 is a perspective view of an embodiment of the present invention. An emitter surface 10, with a plurality of emitter pyramids 12 disposed thereon, is formed on a semiconductor substrate 14. Each pyramid 12, formed from the substrate 14 as described below, has a tip 16 through which electrons will be emitted in the presence of an electric field. A p-n junction 18 of a given area, A p , formed in the substrate, is associated with each emitter pyramid 12 and disposed relative to the pyramid 12 so that all the current entering the pyramid 12 must pass through the p-n junction 18. In FIG. 1 a p-n junction 18 is disposed along the base of each emitting pyramid 12. A metallic grid 20 is disposed above the emitter surface 12. The grid 20 is supported by a dielectric layer 22 deposited on the emitter surface 10. Both the grid 20 and the dielectric layer 22 have plurality of apertures 24 disposed around the emitter pyramids 12. A variable voltage supply 26 is electrically connected to the grid 20 and the semiconductor substrate 14. The description of the operation of the invention is facilitated by referring to FIG. 2, cross-sectional view of the embodiment depicted in FIG. 1. Referring now to FIG. 2, the grid 20 is biased positively with respect to the substrate. This biasing is achieved by electrically connecting the positive output of the variable voltage supply 26 to the grid 20 and the negative output to an electrode 28 disposed on the base of the substrate 14. As the magnitude of the grid voltage, V g , is increased the various pyramid tips 16 will begin emitting electron currents of differing magnitudes. Note that the p-n junction 18 at the base of each pyramid 12 is reverse-biased. Thus, as V g is increased so that V g >V o the current density through the p-n junction 18 will assume a constant value j sat , where j sat is the saturation current density of the junction. The formulae set forth below are well-known in the art and are set forth, for example, in the book by S. M. Sze entitled Physics of Semiconductor Devices, Wiley-Interscience, New York, 1969. The static current density j in a planar abrupt p-n junction can be expressed in the diode form j=j.sub.sat (e.sup.-eV g.sup./kT -1) (1) where V g is the applied grid voltage (positive for reverse bias) and where ##EQU1## n p and p n are the equilibrium minority carrier densities (i.e. of electrons in the p-region and holes in the n-region, respectively), eD n kT=μn and eD p kT=μ p are the minority carrier electron and hole mobilities (e being the electronic charge, T the temperature and k Boltzmann's constant) and τ n and τ p are the minority carrier lifetimes. Thus, at a few volts of reverse bias the current density becomes throttled at the saturation value j sat where it remains fixed until breakdown occurs, giving an operating range of perhaps 60 volts, over which j is nearly constant at the value j sat . As is well know in the art, j sat can be chosen over a range of perhaps 3-6 orders of magnitude by choice of the doping level of intentionally included recombination centers. The minority carrier doping level in silicon, n p , can vary between the intrinsic level of n i =2×10 10 /cc down to 10 4 /cc, and similarly for p n . Lifetimes, τ n and τ p , can also be varied between 10 -7 and 10 -11 sec. Using a typical silicon mobility of μ n =1000 cm 2 /volt-sec., the range of j sat extends from 4×10 -2 amps/cm 2 to 4×10 -5 amps/cm 2 . The actual current, I max , in a pyramid, in the structure of FIGS. 1 and 2 is then I.sub.max =j.sub.sat ×A.sub.p-n where A p-n is the area of the p-n junction in the base of the pyramid 12. The saturation current density of the FEA, J FEA , is then given by: J.sub.FEA =j.sub.sat ×A.sub.p-n where A p-n is the ratio of the area of the p-n junctions 18 to the total area of the emitter surface. Note that J FEA is uniform over the surface of the FEA since it is dependent on the area of the pyramid base instead of the shape and surface conditions of the pyrmiad tip. The area of the base may be precisely controlled by the fabrication techniques to be described below. Similarly, J FEA is a stable and reproducible function of V g , since j sat is determined by the characteristics of the reverse-biased p-n junction. Referring now to FIG. 3A-3H, there are depicted exemplary steps for fabricating the embodiment of the invention illustrated in FIGS. 1 and 2. In FIG. 3A a generally planar, semiconductor substrate 14, which may be a single crystal wafer of silicon (Si), is depicted. A p-n junction 18 is formed in the silicon wafer at a predetermined distance before the upper surface utilizing techniques well-known in the art. Note that the layer between the junction and the upper surface is an n type-silicon 30. The n-layer 30 is then oxidized to a depth of about one micron to produce an oxide layer 32 of SiO 2 . Subsequent to the formation of the oxide layer, a thin photoresist layer 34 is coated over the oxide layer utilizing methods well-known in the art. Subsequent to this processing the intermediate structure depicted in FIG. 3B is formed by exposing the photoresist surface to light projected through a suitable mask and then developing the photoresist layer so that a plurality of developed photoresist islands 36 result. These photoresist islands 36 being located at the points where emitter pyramids 12 are to be formed and are circular with a diameter of about two microns and a thickness on the order of one micron. The undeveloped sections of the photoresist layer are removed by standard techniques. Next the intermediate structure depicted in FIG. 3C is formed by etching away those portions of the SiO 2 layer not protected by the photoresist islands 36 by standard techniques such as ion etching. The photoresist layer must be of the proper thickness and composition so that the differential etching rate between it and the SiO 2 layer is such that the SiO 2 layer is removed before the photoresist islands. Finally, the photoresist islands are removed so that a plurality of SiO 2 masking islands 38 disposed at the desired emitter pyramid positions remain. The next step in fabrication is to etch away most of the n-layer of the substrate, utilizing techniques to be described below, so that a plurality of emitting pyramids 12 disposed on an emitter surface 10 are formed as depicted in FIG. 3D. Note, that the emitter surface 10 and thus the bases of the emitter pyramids 12 are located in the p-layer 44 of the substrate. Therefore, the p-n junction 18 has been etched away except for those sections located in the emitter pyramid. The structure of FIG. 3D is formed by exposing the surface of the Si substrate prepared as in FIG. 3C, having its upper surface parallel to the 100 crystal plane, to an orientation dependent etching (ODE) solution. Examples of ODE solutions include KOH based solutions (e.g. KOH, water, isoproponal) or pyrocatecholethylene diamene. The etching rate of the ODE solution is higher in the direction normal to the upper surface (the 100 plane) than in the directions of the 111 planes. Thus the 111 planes are control planes which form the sides of the emitter pyramids. Etching will be stopped just after the p-n junction between the emitter pyramids has been removed. Note that the SiO 2 masking islands 38 are supported by small necks of silicon at the pyramid tips. The emitting pyramids are integral with the underlying silicon substrate 14, i.e. they are formed from the same single crystal wafer. The emitter pyramids may be formed by alternative methods described in, for example, U.S. Pat. No. 3,970,887. The resulting pyramids may have either planar side or round sides, i.e. the pyramid may be in the shape of a cone. However, the emitter surface and thus the base of the emitter pyramids must be positioned in the p-layer 44 of the substrate so that current passing into an emitter pyramid must pass through the p-n junction 18 positioned within the emitter pyramid. Referring now to FIG. 3E, the dielectric layer 22 and grid 20 are the formed by a self aligned fabrication technique. The emitting surface and emitter pyramids are coated with a dielectric layer 22 from 1 to 4 microns thick. The dielectric layer may be SiO 2 deposited by chemical vapor deposition (CVD) or may be other materials deposited by CVD, sputtering or other techniques. Note that the dielectric layer 22 is not deposited on the pyramids due to the shadow effect of the silicon dioxide masking islands 38, but is deposited on the upper surface of the silicon masking islands 38. A conducting grid 20 from 0.2 to 1.5 microns thick is now deposited on the dielectric layer by CVD, sputtering or other techniques. The grid may be metal (e.g. gold, molybdenum, aluminum, tungsten), semiconductors (e.g. polysilicon) or conducting polymers. The resulting intermediate structure is depicted in FIG. 3E. The final structure depicted in FIG. 3F, is formed by applying a suitable chemical etchant that will attack exposed SiO 2 surfaces but will have no effect on the silicon pyramid or the metal grid. The SiO 2 masking islands and the SiO 2 and metal grid material deposited thereon will be removed by the chemical etchant thereby exposing the tips of the pyramids. The pyramid tips may be sharpened to radii of from 100 Angstroms to 600 Angstroms by: (a) further ODE etching, (b) isotropic etching using standard liquid or plasma processes or (c) oxidizing the pyramid and removing the oxide. FIG. 4 is a perspective view of a second embodiment of invention. Referring now to FIG. 4, an emitter surface 10 is divided into isolation islands 48 by isolation groves 50 etched through the n-layer 30 into the p-layer 44. An emitter pyramid 12 is formed on each isolation island 48 so that the current flowing through the emitter pyramid tip must pass through the p-n junction 18 defined by the isolation island 48 associated with the emitter pyramid. Since the area of the p-n junctions formed by the isolation island 48 is precisely controlled, the magnitude of the current flow from each emitter tip will be equal to a constant value, I max . One advantage of the embodiment depicted in FIG. 4 is that A p-n , the ratio of the area of the p-n junctions to the total area of the emitter surface, is almost unity. Therefore the current density from the FEA will be high since j.sub.FEA =j.sub.sat ×A.sub.P-N The steps for fabricating the embodiment of the invention depicted in FIG. 4 are illustrated in FIGS. 5A-5E. Referring now to FIG. 5A, a semiconductor substrate 14 with a p-n junction 18 formed therein has a two-dimensional pattern of silicon nitride (Si 3 N 4 ) dots 52 deposited on its upper surface. The Si 3 N 4 dots 52 are formed by first depositing a layer of Si 3 N 4 and the using optical or e-beam lithography to form the dots therein. The dots are about 1 to 2 microns in diameter formed in a two dimensional 4 to 10 micron rectangular grid. Subsequently a plurality of SiO 2 masking islands 54 with strip shaped openings between the Si 3 N 4 dots is formed by the deposition and lithography steps described above. The resulting structure is depicted in FIGS. 5B and 5C, a cross-sectional and top view respectively. Next an ODE solution is utilized to etch V-shaped isolation grooves 50 extending through the p-n junction 18 thereby forming isolation islands 48 as depicted in FIG. 5D. Note that the grooves forming the isolation islands need not be V-grooves formed by ODE techniques but may be fabricated by other lithographic-etch techniques well-known in the art. Finally the structure depicted in FIG. 5E is fabricated by forming an emitter pyramid 12 on each isolated section, a dielectric layer 22 and a grid 20 utilizing the self-aligned fabrication techniques described above in relation to FIGS. 3A-3F. Note that the emitter surface 10 formed on the isolation islands 48 must be disposed above the isolated p-n junctions 18. An FEA constructed with in accordance the claims of the invention will feature several advantages over prior-art FEAs. First, array emission uniformity is improved since the value of the emission current from each emitter tip is controlled by standard p-n junction and integrated circuit fabrication technology in contrast to the dependence on emission tip shape and surface conditions in prior-art devices. Second, current stability and reproducibility are improved since current values now depend on the well-known stability of reverse-biased p-n junctions in contrast to the dependence on surface-barrier height and tip shape of prior art devices. It will be understood that various changes in the details, material, steps and arrangements of parts, which have been herein described and illustrated in order to explain the nature of the invention, may be made by those of ordinary skill in the art within the principle and scope of the invention as expressed in the appended claims.

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Patent Citations (13)

    Publication numberPublication dateAssigneeTitle
    US-2105166-AJanuary 11, 1938Schwarzkopf PaulElectrical heating element
    US-2960659-ANovember 15, 1960Bell Telephone Labor IncSemiconductive electron source
    US-3581151-AMay 25, 1971Bell Telephone Labor IncCold cathode structure comprising semiconductor whisker elements
    US-3665241-AMay 23, 1972Stanford Research InstField ionizer and field emission cathode structures and methods of production
    US-3716740-AFebruary 13, 1973Bell Telephone Labor IncPhotocathode with photoemitter activation controlled by diode array
    US-3830717-AAugust 20, 1974Philips CorpSemiconductor camera tube target
    US-3845296-AOctober 29, 1974Us ArmyPhotosensitive junction controlled electron emitter
    US-3970887-AJuly 20, 1976Micro-Bit CorporationMicro-structure field emission electron source
    US-3998678-ADecember 21, 1976Hitachi, Ltd.Method of manufacturing thin-film field-emission electron source
    US-4008412-AFebruary 15, 1977Hitachi, Ltd.Thin-film field-emission electron source and a method for manufacturing the same
    US-4255207-AMarch 10, 1981Harris CorporationFabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
    US-4303930-ADecember 01, 1981U.S. Philips CorporationSemiconductor device for generating an electron beam and method of manufacturing same
    US-4307507-ADecember 29, 1981The United States Of America As Represented By The Secretary Of The NavyMethod of manufacturing a field-emission cathode structure

NO-Patent Citations (0)

    Title

Cited By (174)

    Publication numberPublication dateAssigneeTitle
    US-5267884-ADecember 07, 1993Mitsubishi Denki Kabushiki KaishaMicrominiature vacuum tube and production method
    US-6762056-B1July 13, 2004Protiveris, Inc.Rapid method for determining potential binding sites of a protein
    US-5019003-AMay 28, 1991Motorola, Inc.Field emission device having preformed emitters
    US-4908539-AMarch 13, 1990Commissariat A L'energie AtomiqueDisplay unit by cathodoluminescence excited by field emission
    US-4857161-AAugust 15, 1989Commissariat A L'energie AtomiqueProcess for the production of a display means by cathodoluminescence excited by field emission
    US-5536193-AJuly 16, 1996Microelectronics And Computer Technology CorporationMethod of making wide band gap field emitter
    US-4969468-ANovember 13, 1990Alfred E. Mann Foundation For Scientific ResearchElectrode array for use in connection with a living body and method of manufacture
    WO-9115874-A1October 17, 1991Motorola, Inc.Dispositif a emission de champ a cathode froide comprenant des dispositifs integres de commande ou commandes du type sans emission de champ
    US-5828288-AOctober 27, 1998Fed CorporationPedestal edge emitter and non-linear current limiters for field emitter displays and other electron source applications
    US-5763997-AJune 09, 1998Si Diamond Technology, Inc.Field emission display device
    US-6174449-B1January 16, 2001Micron Technology, Inc.Magnetically patterned etch mask
    US-5245247-ASeptember 14, 1993Mitsubishi Denki Kabushiki KaishaMicrominiature vacuum tube
    US-5647998-AJuly 15, 1997Advanced Vision Technologies, Inc.Fabrication process for laminar composite lateral field-emission cathode
    US-5569973-AOctober 29, 1996International Business Machines CorporationIntegrated microelectronic device
    US-5647785-AJuly 15, 1997McncMethods of making vertical microelectronic field emission devices
    US-5561339-AOctober 01, 1996Fed CorporationField emission array magnetic sensor devices
    US-5203731-AApril 20, 1993International Business Machines CorporationProcess and structure of an integrated vacuum microelectronic device
    US-5148078-ASeptember 15, 1992Motorola, Inc.Field emission device employing a concentric post
    US-4901028-AFebruary 13, 1990The United States Of America As Represented By The Secretary Of The NavyField emitter array integrated distributed amplifiers
    US-4659964-AApril 21, 1987U.S. Philips CorporationDisplay tube
    US-4943343-AJuly 24, 1990Zaher Bardai, Rolph Randy K, Lamb Arlene E, Longo Robert T, Manoly Arthur E, Ralph FormanSelf-aligned gate process for fabricating field emitter arrays
    US-4835438-AMay 30, 1989Commissariat A L'energie AtomiqueSource of spin polarized electrons using an emissive micropoint cathode
    US-5204581-AApril 20, 1993Bell Communications Research, Inc.Device including a tapered microminiature silicon structure
    US-5500572-AMarch 19, 1996Eastman Kodak CompanyHigh resolution image source
    US-5465024-ANovember 07, 1995Motorola, Inc.Flat panel display using field emission devices
    US-5531880-AJuly 02, 1996Microelectronics And Computer Technology Corporation, Si Diamond Technology, IncorporatedMethod for producing thin, uniform powder phosphor for display screens
    US-5378658-AJanuary 03, 1995Fujitsu LimitedPatterning process including simultaneous deposition and ion milling
    US-5136764-AAugust 11, 1992Motorola, Inc.Method for forming a field emission device
    US-5201992-AApril 13, 1993Bell Communications Research, Inc.Method for making tapered microminiature silicon structures
    US-5125000-AJune 23, 1992Commissariat A L'energie AtomiqueCompact electronic pumping-type semiconductor laser
    US-5094975-AMarch 10, 1992Research Development Corporation, Byron Bong SiuMethod of making microscopic multiprobes
    US-5481156-AJanuary 02, 1996Samsung Display Devices Co., Ltd.Field emission cathode and method for manufacturing a field emission cathode
    US-5227701-AJuly 13, 1993Mcintyre Peter MGigatron microwave amplifier
    US-5703380-ADecember 30, 1997Advanced Vision Technologies Inc.Laminar composite lateral field-emission cathode
    FR-2623013-A1May 12, 1989Commissariat Energie AtomiqueSource d'electrons a cathodes emissives a micropointes et dispositif de visualisation par cathodoluminescence excitee par emission de champ,utilisant cette source
    WO-9315522-A1August 05, 1993Massachusetts Institute Of TechnologyCathode froide en diamant
    US-5245248-ASeptember 14, 1993Northeastern UniversityMicro-emitter-based low-contact-force interconnection device
    US-5141459-AAugust 25, 1992International Business Machines CorporationStructures and processes for fabricating field emission cathodes
    US-5695658-ADecember 09, 1997Micron Display Technology, Inc.Non-photolithographic etch mask for submicron features
    US-5138237-AAugust 11, 1992Motorola, Inc.Field emission electron device employing a modulatable diamond semiconductor emitter
    US-5903098-AMay 11, 1999Fed CorporationField emission display device having multiplicity of through conductive vias and a backside connector
    US-6423239-B1July 23, 2002Micron Technology, Inc.Methods of making an etch mask and etching a substrate using said etch mask
    US-5359256-AOctober 25, 1994The United States Of America As Represented By The Secretary Of The NavyRegulatable field emitter device and method of production thereof
    US-5841219-ANovember 24, 1998University Of Utah Research FoundationMicrominiature thermionic vacuum tube
    US-6165374-ADecember 26, 2000Micron Technology, Inc.Method of forming an array of emitter tips
    US-5903243-AMay 11, 1999Fed CorporationCompact, body-mountable field emission display device, and display panel having utility for use therewith
    US-5955828-ASeptember 21, 1999University Of Utah Research FoundationThermionic optical emission device
    US-2004106220-A1June 03, 2004Merkulov Vladimir I., Lowndes Douglas H., Guillorn Michael A., Simpson Michael L.Carbon tips with expanded bases
    US-5686791-ANovember 11, 1997Microelectronics And Computer Technology Corp.Amorphic diamond film flat field emission cathode
    US-5220725-AJune 22, 1993Northeastern UniversityMicro-emitter-based low-contact-force interconnection device
    US-5391259-AFebruary 21, 1995Micron Technology, Inc.Method for forming a substantially uniform array of sharp tips
    US-5079476-AJanuary 07, 1992Motorola, Inc.Encapsulated field emission device
    US-6252347-B1June 26, 2001Raytheon CompanyField emission display with suspended focusing conductive sheet
    US-5543691-AAugust 06, 1996Raytheon CompanyField emission display with focus grid and method of operating same
    US-5675216-AOctober 07, 1997Microelectronics And Computer Technololgy Corp.Amorphic diamond film flat field emission cathode
    US-5652083-AJuly 29, 1997Microelectronics And Computer Technology CorporationMethods for fabricating flat panel display systems and components
    US-5614353-AMarch 25, 1997Si Diamond Technology, Inc.Methods for fabricating flat panel display systems and components
    US-5007873-AApril 16, 1991Motorola, Inc.Non-planar field emission device having an emitter formed with a substantially normal vapor deposition process
    US-5361015-ANovember 01, 1994Canon Kabushiki KaishaElectron emission element
    US-9238384-B2January 19, 2016Toppan Printing Co., Ltd.Method of manufacturing microneedle
    WO-8707825-A1December 30, 1987Alfred E. Mann Foundation For Scientific ResearchReseau d'electrodes et procede de fabrication
    US-5844351-ADecember 01, 1998Fed CorporationField emitter device, and veil process for THR fabrication thereof
    US-5861707-AJanuary 19, 1999Si Diamond Technology, Inc.Field emitter with wide band gap emission areas and method of using
    US-6127773-AOctober 03, 2000Si Diamond Technology, Inc.Amorphic diamond film flat field emission cathode
    FR-2573573-A1May 23, 1986Philips NvCathode semi-conductrice a stabilite augmentee
    US-5475280-ADecember 12, 1995McncVertical microelectronic field emission devices
    US-5188977-AFebruary 23, 1993Siemens AktiengesellschaftMethod for manufacturing an electrically conductive tip composed of a doped semiconductor material
    US-5055077-AOctober 08, 1991Motorola, Inc.Cold cathode field emission device having an electrode in an encapsulating layer
    US-5551903-ASeptember 03, 1996Microelectronics And Computer TechnologyFlat panel display based on diamond thin films
    US-6204834-B1March 20, 2001Si Diamond Technology, Inc.System and method for achieving uniform screen brightness within a matrix display
    US-5070282-ADecember 03, 1991Thomson Tubes ElectroniquesAn electron source of the field emission type
    DE-4242595-C2June 18, 2003Samsung Electronic DevicesVerfahren zum Herstellen einer Feldemissionsanzeigevorrichtung
    US-2006244852-A1November 02, 2006Zhongyi XiaImage sensors
    US-5811020-ASeptember 22, 1998Micron Technology, Inc.Non-photolithographic etch mask for submicron features
    US-5548181-AAugust 20, 1996Fed CorporationField emission device comprising dielectric overlayer
    US-7268361-B2September 11, 2007Ict, Integrated Circuit Testing Gesellschaft Fur Halbleiterpruftechnik MbhElectron emission device
    US-5949182-ASeptember 07, 1999Cornell Research Foundation, Inc.Light-emitting, nanometer scale, micromachined silicon tips
    FR-2879343-A1June 16, 2006Thales SaDispositif a effet de champ comprenant un dispositif saturateur de courant
    US-5619097-AApril 08, 1997Fed CorporationPanel display with dielectric spacer structure
    US-5281890-AJanuary 25, 1994Motorola, Inc.Field emission device having a central anode
    US-4940916-AJuly 10, 1990Commissariat A L'energie AtomiqueElectron source with micropoint emissive cathodes and display means by cathodoluminescence excited by field emission using said source
    US-5703435-ADecember 30, 1997Microelectronics & Computer Technology Corp.Diamond film flat field emission cathode
    US-5818500-AOctober 06, 1998Eastman Kodak CompanyHigh resolution field emission image source and image recording apparatus
    US-5587623-ADecember 24, 1996Fed CorporationField emitter structure and method of making the same
    US-6727637-B2April 27, 2004Micron Technology, Inc.Buffered resist profile etch of a field emission device structure
    US-5600200-AFebruary 04, 1997Microelectronics And Computer Technology CorporationWire-mesh cathode
    US-5828163-AOctober 27, 1998Fed CorporationField emitter device with a current limiter structure
    US-5012482-AApril 30, 1991The United States Of America As Represented By The Secretary Of The NavyGas laser and pumping method therefor using a field emitter array
    US-6126845-AOctober 03, 2000Micron Technology, Inc.Method of forming an array of emmitter tips
    US-5030921-AJuly 09, 1991Motorola, Inc.Cascaded cold cathode field emission devices
    US-5777427-AJuly 07, 1998Matsushita Electric Industrial Co., Ltd.Electron emission cathode having a semiconductor film; a device including the cathode; and a method for making the cathode
    US-5529524-AJune 25, 1996Fed CorporationMethod of forming a spacer structure between opposedly facing plate members
    WO-2006063967-A1June 22, 2006ThalesDispositif a effet de champ comprenant un dispositif saturateur de courant
    US-6281621-B1August 28, 2001Kabushiki Kaisha ToshibaField emission cathode structure, method for production thereof, and flat panel display device using same
    US-2005023517-A1February 03, 2005Zhongyi XiaVideo camera and other apparatus that include integrated field emission array sensor, display, and transmitter
    US-5463269-AOctober 31, 1995International Business Machines CorporationProcess and structure of an integrated vacuum microelectronic device
    US-5396150-AMarch 07, 1995Industrial Technology Research InstituteSingle tip redundancy method and resulting flat panel display
    US-5334908-AAugust 02, 1994International Business Machines CorporationStructures and processes for fabricating field emission cathode tips using secondary cusp
    US-4837049-AJune 06, 1989Alfred E. Mann Foundation For Scientific ResearchMethod of making an electrode array
    US-5601966-AFebruary 11, 1997Microelectronics And Computer Technology CorporationMethods for fabricating flat panel display systems and components
    US-5628659-AMay 13, 1997Microelectronics And Computer Corporation, Si Diamond Technology, IncorporatedMethod of making a field emission electron source with random micro-tip structures
    US-9852870-B2December 26, 2017Corporation For National Research InitiativesMethod for the fabrication of electron field emission devices including carbon nanotube field electron emisson devices
    US-6080325-AJune 27, 2000Micron Technology, Inc.Method of etching a substrate and method of forming a plurality of emitter tips
    EP-0376825-A1July 04, 1990Thomson Tubes ElectroniquesElectron source of the field emission type
    US-5984752-ANovember 16, 1999Matsushita Electric Industrial Co., Ltd.Electron emission cathode; an electron emission device, a flat display, a thermoelectric cooling device incorporating the same; and a method for producing the electron emission cathode
    US-5754009-AMay 19, 1998Hughes ElectronicsLow cost system for effecting high density interconnection between integrated circuit devices
    US-5176557-AJanuary 05, 1993Canon Kabushiki KaishaElectron emission element and method of manufacturing the same
    US-5847504-ADecember 08, 1998Sgs-Thomson Microelectronics, S.R.L.Field emission display with diode-limited cathode current
    US-5047830-ASeptember 10, 1991Amp IncorporatedField emitter array integrated circuit chip interconnection
    US-5534743-AJuly 09, 1996Fed CorporationField emission display devices, and field emission electron beam source and isolation structure components therefor
    US-5660570-AAugust 26, 1997Northeastern UniversityMicro emitter based low contact force interconnection device
    EP-0757341-A1February 05, 1997SGS-THOMSON MICROELECTRONICS S.r.l.Begrenzung und Selbst-vergleichmässigung von durch Mikrospitzen einer flachen Feldemissionsbildwiedergabevorrichtung fliessenden Kathodenströmen
    US-2003155859-A1August 21, 2003Masayuki Nakamoto, Atsuo InoueMethod of manufacturing field emission device and display apparatus
    US-5201681-AApril 13, 1993Canon Kabushiki KaishaMethod of emitting electrons
    US-6296740-B1October 02, 2001Si Diamond Technology, Inc.Pretreatment process for a surface texturing process
    US-5150192-ASeptember 22, 1992The United States Of America As Represented By The Secretary Of The NavyField emitter array
    US-6822386-B2November 23, 2004Micron Technology, Inc.Field emitter display assembly having resistor layer
    US-5629583-AMay 13, 1997Fed CorporationFlat panel display assembly comprising photoformed spacer structure, and method of making the same
    US-5420054-AMay 30, 1995Samsung Display Devices Co., Ltd.Method for manufacturing field emitter array
    US-5670788-ASeptember 23, 1997Massachusetts Institute Of TechnologyDiamond cold cathode
    US-2003001489-A1January 02, 2003Ammar DerraaField emitter display assembly having resistor layer
    US-5461280-AOctober 24, 1995MotorolaField emission device employing photon-enhanced electron emission
    US-5753130-AMay 19, 1998Micron Technology, Inc.Method for forming a substantially uniform array of sharp tips
    US-5126287-AJune 30, 1992McncSelf-aligned electron emitter fabrication method and devices formed thereby
    US-5397957-AMarch 14, 1995International Business Machines CorporationProcess and structure of an integrated vacuum microelectronic device
    US-2012301981-A1November 29, 2012Mehmet Ozgur, Paul Sunal, Oh Lance, Michael Huff, Michael PedersenMethod for the fabrication of electron field emission devices including carbon nanotube field electron emisson devices
    US-5163328-ANovember 17, 1992Colin Electronics Co., Ltd.Miniature pressure sensor and pressure sensor arrays
    US-5886460-AMarch 23, 1999Fed CorporationField emitter device, and veil process for the fabrication thereof
    US-5583393-ADecember 10, 1996Fed CorporationSelectively shaped field emission electron beam source, and phosphor array for use therewith
    US-5157309-AOctober 20, 1992Motorola Inc.Cold-cathode field emission device employing a current source means
    US-2004238809-A1December 02, 2004Pavel Adamec, Dieter WinklerElectron emission device
    US-6084341-AJuly 04, 2000Nec CorporationElectric field emission cold cathode
    US-5371431-ADecember 06, 1994McncVertical microelectronic field emission devices including elongate vertical pillars having resistive bottom portions
    US-7109515-B2September 19, 2006Ut-Battelle LlcCarbon containing tips with cylindrically symmetrical carbon containing expanded bases
    US-6163107-ADecember 19, 2000Futaba Denshi Kogyo K.K., Director General Agency Of Industrial Science And TechnologyField emission cathode
    US-6464550-B2October 15, 2002Micron Technology, Inc.Methods of forming field emission display backplates
    US-5679043-AOctober 21, 1997Microelectronics And Computer Technology Corporation, Si Diamond Technology, Inc.Method of making a field emitter
    FR-2661566-A1October 31, 1991Commissariat Energie AtomiqueLaser compact a semi-conducteur du type a pompage electronique.
    EP-0454566-A1October 30, 1991Commissariat A L'energie AtomiqueKompakter, elektronengepumpter Halbleiterlaser
    US-2002113536-A1August 22, 2002Ammar DerraaField emitter display (FED) assemblies and methods of forming field emitter display (FED) assemblies
    US-5612712-AMarch 18, 1997Microelectronics And Computer Technology CorporationDiode structure flat panel display
    WO-03005398-A1January 16, 2003Ict, Integrated Circuit Testing Gesellschaft Für Halbleiterprüftechnik MbhElectron emission device
    US-6629869-B1October 07, 2003Si Diamond Technology, Inc.Method of making flat panel displays having diamond thin film cathode
    US-4712039-ADecember 08, 1987Hong Lazaro MVacuum integrated circuit
    US-5218273-AJune 08, 1993Motorola, Inc.Multi-function field emission device
    EP-0316214-A1May 17, 1989Commissariat A L'energie AtomiqueSource d'électrons à cathodes émissives à micropointes et dispositif de visualisation par cathodoluminescence excitée par émission de champ, utilisant cette source
    GB-2250634-AJune 10, 1992Marconi Gec LtdPoint contact diodes
    US-5688158-ANovember 18, 1997Fed CorporationPlanarizing process for field emitter displays and other electron source applications
    US-5374868-ADecember 20, 1994Micron Display Technology, Inc.Method for formation of a trench accessible cold-cathode field emission device
    DE-4242595-A1November 04, 1993Samsung Electronic DevicesVerfahren zum herstellen einer feldemissionsanzeigevorrichtung
    US-7175495-B2February 13, 2007Kabushiki Kaisha ToshibaMethod of manufacturing field emission device and display apparatus
    US-2013140267-A1June 06, 2013Toppan Printing Co., Ltd.Method of manufacturing microneedle
    US-5142184-AAugust 25, 1992Kane Robert CCold cathode field emission device with integral emitter ballasting
    US-4763043-AAugust 09, 1988Raytheon CompanyP-N junction semiconductor secondary emission cathode and tube
    US-RE40490-ESeptember 09, 2008Micron Technology, Inc.Method and apparatus for programmable field emission display
    US-5378962-AJanuary 03, 1995The United States Of America As Represented By The Secretary Of The NavyMethod and apparatus for a high resolution, flat panel cathodoluminescent display device
    US-6552477-B2April 22, 2003Micron Technology, Inc.Field emission display backplates
    US-5159260-AOctober 27, 1992Hitachi, Ltd.Reference voltage generator device
    WO-9708727-A1March 06, 1997Fed CorporationPlanarizing process for field emitter displays and other electron source applications
    EP-0706196-A2April 10, 1996Matsushita Electric Industrial Co., Ltd.Cathode émittrice d'électrons; un dispositif d'émission d'électrons, un dispositif d'affichage plat, dispositif de refroidissement thermoélectrique la contenant; et procédé pour la fabrication de la cathode émittrice d'électrons
    FR-2752643-A1February 27, 1998Nec CorpCathode froide a emission de champ electrique
    US-4766340-AAugust 23, 1988Mast Karel D V D, Hoeberechts Arthur M E, Gorkom Gerardus G P VanSemiconductor device having a cold cathode
    FR-2641412-A1July 06, 1990Thomson Tubes ElectroniquesSource d'electrons du type a emission de champ
    US-6992698-B1January 31, 2006Micron Technology, Inc.Integrated field emission array sensor, display, and transmitter, and apparatus including same
    US-5057047-AOctober 15, 1991The United States Of America As Represented By The Secretary Of The NavyLow capacitance field emitter array and method of manufacture therefor
    EP-1274111-A1January 08, 2003ICT, Integrated Circuit Testing GmbHElectron emission device
    EP-0493676-A1July 08, 1992Siemens AktiengesellschaftVerfahren zur Herstellung einer elektrisch leitenden Spitze aus einem dotierten Halbleitermaterial
    US-2005023442-A1February 03, 2005Zhongyi XiaImaging display and storage methods effected with an integrated field emission array sensor, display, and transmitter
    US-2006178076-A1August 10, 2006Masayuki Nakamoto, Atsuo InoueMethod of manufacturing field emission device and display apparatus
    WO-9220087-A1November 12, 1992Eastman Kodak CompanySource d'images a haute resolution
    EP-0706196-A3August 21, 1996Matsushita Electric Ind Co LtdAn electron emission cathode; an electron emission device, a flat display, a thermoelectric cooling device incorporating the same; and a method for producing the electron emission cathode
    US-2012052246-A1March 01, 2012Northwestern UniversityMesoscale pyramids, arrays and methods of preparation
    US-5663608-ASeptember 02, 1997Fed CorporationField emission display devices, and field emisssion electron beam source and isolation structure components therefor
    US-4956574-ASeptember 11, 1990Motorola, Inc.Switched anode field emission device